How are ADC and DAC organized and operated? Part 1
There are mainly three ADC designs:
– parallel: the input signal is compared simultaneously with the reference
levels by a set of comparison circuits (comparators), which are formed in
the output is a binary value. In such ADC, the number of comparators is (2
raised to the power of N) – 1, where N is the digit capacity of the digital code (by eight times
inline – 255), which does not allow increasing the bit depth above 10-12.
– successive approximation – the converter using the auxiliary
The digital DAC generates a reference signal that is compared to the input signal.
The reference signal is changed sequentially by half
division (dichotomy), used in many convergence methods
Xia seeks applied mathematics. This allows you to complete the conversion.
for the number of clock cycles equal to the width of the word, regardless of size
input sign masks.
– with time interval measurement – a large group of ADCs using
to measure the input signal various level conversion principles
in proportional time intervals, whose duration is
It is controlled by a high frequency clock generator. Sometimes called
They are also counting ADC.
Among ADCs with time interval measurement, the following three prevail
type:
– sequential counting or simple integration
(single slope): the generator starts on every conversion cycle
Linearly increasing voltage, which is compared to the input.
Typically this voltage is obtained from an auxiliary DAC, such as an ADC.
successive approximations.
– double integration (double slope) – in each conversion cycle
the input signal charges the capacitor, which is then discharged to discharge
Reference voltage point with measurement of discharge duration.
– tracking: a variant of the sequential counting ADC, in which the generator
the reference voltage torus does not reset every cycle, but changes
changes it from the previous value to the current one.
The most popular version of the Tracking ADC is Sigma-Delta, which is
operating at a frequency Fs, significantly (64 or more times) higher
the sampling frequency Fd of the digital output signal. The comparator is
th ADC produces reduced bit depth values (usually one bit –
0/1), whose sum in the sampling interval Fd is proportional to the
face countdown. The sequence of low bit values is subject to
digital filtering and frequency reduction (decimated), in
resulting in a series of reads with a given bit depth and time
the same sampling Fd.
To improve the signal-to-noise ratio and reduce the influence of quantum errors
vaniya, which in the case of a one-bit converter gives
arbitrarily high, the noise shaping method is applied through
error feedback and digital filtering circuits. As a result
applying this method, the shape of the noise spectrum changes so that the main
noise energy is shifted to the region above half the frequency Fs, inadvertently
most of it remains in the lower half, and most of the noise
removed from the original analog signal band.
DACs are mainly based on two principles:
– weighing – with the sum of weighted currents or voltages, when
yes, each bit of the input word introduces a corresponding binary
weight contribution to the total value of the received analog signal; such
DACs are also called parallel or multibit (multibit).
– Sigma-Delta, according to the operating principle, reverse ADCs of the same type. Entry-
digital signal undergoes significant retransmission (64x or more)
cretization and fed to the modulator, which forms low bits (usually
single bit values) processed by the Noise Shaping method (usually
implemented using a digital filter and error feedback).
Resulting low bit counts drive the dispensing circuit
reference loads, which are added with the same high frequency to
exit sign.
The types of DACs that produce a true 1-bit stream are called a bit stream.
(bit stream) or PDM (pulse density modulation)
pulses). A slightly different type is a pulse width DAC
modulation (PWM, pulse width modulation, PWM), when the circuit is selected
ki-storage of an analog signal, pulses of constant amplitude are emitted
and variable duration, controlling the dosage of the output
load. MASH converters (Multi-stAge
Noise modeling: Matsushita’s multi-stage noise modeling). In them
a feedback signal is received by several training schemes at the same time by mistake
noise, which controls the width of the output pulse.
