Noise – Part 3
In addition to those considered, other technologies are used, as well as their combinations and variations.
Manufacturers especially love experimenting with digital filters and modulators, inventing more and more digital filters that affect the signal for both better and worse. Modern DAC digital signal processing algorithms are often complex and include all of the above, as well as manufacturers’ own developments. Of course, manufacturers do not publish algorithms for filters and modulators; at best, they provide a rough block diagram. Therefore, it remains only to assume what actually happens with the audio signal inside one or another digital-to-analog converter.
Sigma delta converters
Sigma-delta digital-to-analog converters have evolved apart from multi-bit DACs. The base was taken, as its name indicates, sigma-delta modulation, in the literature it is usually denoted by the abbreviation SDM. In sigma-delta modulation, the absolute value of the signal amplitude is not transmitted per unit time, as in multi-bit DACs, but the signal changes from the previous value. So if the amplitude increases, 1 is transmitted, and if it falls – 0. A similar principle was already described in the section on DSD.
Early sigma-delta DACs were completely 1-bit, but due to the high sample rate, they provided a dynamic range of approximately 129 dB. The sampling frequency is 44.1 kHz. The chosen frequency probably saved hardware resources due to simplification of calculations during interpolation.
At the beginning, a frequency of 2.8 MHz was used, this is 44.1 kHz, increased 64 times. Now the frequency can be different, it is determined by the internal architecture of the DAC itself. It is generally based on frequency grids in multiples of 44.1 kHz and 48 kHz, with a multiplier of 64, 128, 256, 512, 1024.
Over time, delta-sigma DACs have almost completely supplanted multibit, simply for economic reasons. First, its component quality and precision requirements are much lower than multi-bit DACs, and consequently the cost price is lower. Second, in the 1980s and 1990s, the cost of implementing interpolation and noise shaping for a one-bit modulator was significantly less than for 16-bit. Now, with the development of technology, this is not that critical, and many sigma-delta DACs, like multibits, have multiple levels of output. But due to the multiple increase in frequency, the requirements for the components are not still very high, so the first advantage continues to this day.
Modern sigma-delta DACs are complex and include almost all of the technologies listed in the previous chapter. I will give an example of the internal structure of one of the simple sigma-delta-DACs from the Vologdin lectures.
Input 16-bit digital samples with a sampling frequency of 44.1 kHz are fed into the digital oversampling filter. The scheme uses a non-recursive quadruple oversampling FIR (finite impulse response) interpolation filter with a linear phase response. In the first modulation stage, as a result of requantization, the number of bits in the samples is reduced from 16 to 14 and first-order SDM is used. Then a further resampling is performed using two steps (Kos = 32 and 2). A noise signal is introduced on the path between these stages, performing the “Dithering” operation with a noise level equal to minus 20 dB. It reduces the non-linearity of the transfer function due to quantization errors. The overall oversampling factor is 256 and the sampling frequency increases to 11.29 MHz. In the second modulation stage, second-order SDM is used and a one-bit digital stream is formed. The DAC output is connected to a digital time pulse modulator, which converts the digital data into a density modulated pulse sequence (PDM).
